The hydrogen-induced piezoelectric effect in InP HEMTs

Hydrogen exposure of III-V HEMTs has been shown to cause a threshold voltage shift, AVT. This is a serious reliability concern. This effect has been attributed to a H-induced piezoelectric effect. Formation of TiHX expands the Ti layer in the gate, causing mechanical stress in the underlying semiconductor. This induces piezoelectric charge in the heterostructure underneath the gate that shifts the threshold voltage. This thesis investigates the influence of the gate and heterostructure dimensions and composition on the H-induced AVT in order to come up with practical device level solutions to this problem. Towards this goal, a model for the impact of the hydrogen-induced piezoelectric effect on the threshold voltage of InP HEMTs was developed using 2D finite element simulations to calculate the mechanical stress caused by a Ti-containing gate that has expanded due to hydrogen absorption. A simple electrostatics model was used to calculate the impact of this piezoelectric polarization charge on the threshold voltage. This model explained the experimentally observed gate length dependence of AVT in InP HEMTs. Then, this model was experimentally verified using advanced InP HEMTs with a WSiN/Ti/Pt/Au gate or a thick Ti-layer in the Ti/Pt/Au gate stack. We have found that only a thin top layer of the thick Ti layer expanded after exposure to hydrogen. The impact of hydrogen on the threshold voltage of these devices is one order of magnitude smaller than conventional Ti/Pt/Au-gate HEMTs. The model showed that there are two main causes for the improvement of the H-sensitivity. First, the separation of the Ti-layer from the semiconductor by a thick non-expanding layer significantly reduces the stress in the active layer. Additionally, the thinner heterostructure and the presence of an InP etch-stop layer with a small piezoelectric constant underneath the gate reduces the amount of threshold voltage shift that is caused by the mechanical stress. This thesis concludes that the H-induced piezoelectric AVT can be significantly reduced by placing a non-expanding layer underneath the Ti-layer in the gate stack. Thinning the channel and insulator also helps mitigate the H-induced AVT.